Routing in the third dimension : from VLSI chips to MCMs / Naveed A. Sherwani, Siddharth Bhingarde, Anand Panyam.
Material type:
- text
- electronic
- online resource
- 9780470546376
- Integrated circuits -- Very large scale integration -- Computer-aided design
- Multichip modules (Microelectronics) -- Computer-aided design
- Algorithm design and analysis
- Approximation algorithms
- Approximation methods
- Bibliographies
- Bipartite graph
- CMOS integrated circuits
- Classification algorithms
- Color
- Compaction
- Complexity theory
- Computer architecture
- Delay
- Estimation
- Fabrication
- Heuristic algorithms
- Indexes
- Integrated circuit interconnections
- Integrated circuit modeling
- Layout
- Libraries
- Logic gates
- Mathematical model
- Metals
- Microprocessors
- Minimization
- Nickel
- Pins
- Polynomials
- Regions
- Routing
- Shape
- Substrates
- Terminology
- Transistors
- Very large scale integration
- Wire
- 621.39/5
Includes bibliographical references (p. 335-350) and indexes.
Preface. Acknowledgments. Introduction. Graphs and Basic Algorithms. Channel Routing and Terminal Assignment. Routing Models. Basic Problems in Routing. Routing Algorithms for the Two-Layer Process. Routing Algorithms for the Three-Layer Process. Routing Algorithms for the Advanced Three-Layered Process. Routing Algorithms for Advanced VLSI and Thin-Film MCMs. Routing Algorithms for General MCMs. Bibliography. Author Index. Subject Index.
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This key text addresses the complex computer chips of tomorrow which will consist of several layers of metal interconnect, making the interconnect within a chip or a multichip module a three dimensional problem. You'll find an insightful approach to the algorithmic, cell design issues in chip and MCM routing with an emphasis on techniques for eliminating routing area.
Also available in print.
Mode of access: World Wide Web
Description based on PDF viewed 12/21/2015.
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