Mobile 3D graphics SoC : (Record no. 40364)
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| 000 -LEADER | |
|---|---|
| fixed length control field | 06156nam a2200937 i 4500 |
| 001 - CONTROL NUMBER | |
| control field | 5676102 |
| 003 - CONTROL NUMBER IDENTIFIER | |
| control field | IEEE |
| 005 - DATE AND TIME OF LATEST TRANSACTION | |
| control field | 20230927112351.0 |
| 006 - FIXED-LENGTH DATA ELEMENTS--ADDITIONAL MATERIAL CHARACTERISTICS | |
| fixed length control field | m o d |
| 007 - PHYSICAL DESCRIPTION FIXED FIELD--GENERAL INFORMATION | |
| fixed length control field | cr |n||||||||| |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
| fixed length control field | 151221s2010 njua ob 001 eng d |
| 010 ## - LIBRARY OF CONGRESS CONTROL NUMBER | |
| Canceled/invalid LC control number | 2009049311 (print) |
| 016 ## - NATIONAL BIBLIOGRAPHIC AGENCY CONTROL NUMBER | |
| Canceled/invalid control number | 015478740 (print) |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| International Standard Book Number | 9780470823798 |
| Qualifying information | ebook |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| Canceled/invalid ISBN | 9780470823774 |
| Qualifying information | cloth |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| Canceled/invalid ISBN | 0470823771 |
| Qualifying information | cloth |
| 024 7# - OTHER STANDARD IDENTIFIER | |
| Standard number or code | 10.1002/9780470823798 |
| Source of number or code | doi |
| 035 ## - SYSTEM CONTROL NUMBER | |
| System control number | (CaBNVSL)mat05676102 |
| 035 ## - SYSTEM CONTROL NUMBER | |
| System control number | (IDAMS)0b0000648144b7d1 |
| 040 ## - CATALOGING SOURCE | |
| Original cataloging agency | CaBNVSL |
| Language of cataloging | eng |
| Description conventions | rda |
| Transcribing agency | CaBNVSL |
| Modifying agency | CaBNVSL |
| 082 00 - DEWEY DECIMAL CLASSIFICATION NUMBER | |
| Classification number | 621.3815 |
| 245 00 - TITLE STATEMENT | |
| Title | Mobile 3D graphics SoC : |
| Remainder of title | from algorithm to chip / |
| Statement of responsibility, etc. | Jeong-Ho Woo ... [et al.]. |
| 246 3# - VARYING FORM OF TITLE | |
| Title proper/short title | Mobile three-dimensional graphics systems on a chip |
| 264 #1 - PRODUCTION, PUBLICATION, DISTRIBUTION, MANUFACTURE, AND COPYRIGHT NOTICE | |
| Place of production, publication, distribution, manufacture | Singapore ; |
| Name of producer, publisher, distributor, manufacturer | John Wiley & Sons, |
| Date of production, publication, distribution, manufacture, or copyright notice | c2010. |
| 264 #2 - PRODUCTION, PUBLICATION, DISTRIBUTION, MANUFACTURE, AND COPYRIGHT NOTICE | |
| Place of production, publication, distribution, manufacture | [Piscataqay, New Jersey] : |
| Name of producer, publisher, distributor, manufacturer | IEEE Xplore, |
| Date of production, publication, distribution, manufacture, or copyright notice | [2010] |
| 300 ## - PHYSICAL DESCRIPTION | |
| Extent | 1 PDF (x, 327 pages) : |
| Other physical details | illustrations (some color). |
| 336 ## - CONTENT TYPE | |
| Content type term | text |
| Source | rdacontent |
| 337 ## - MEDIA TYPE | |
| Media type term | electronic |
| Source | isbdmedia |
| 338 ## - CARRIER TYPE | |
| Carrier type term | online resource |
| Source | rdacarrier |
| 504 ## - BIBLIOGRAPHY, ETC. NOTE | |
| Bibliography, etc. note | Includes bibliographical references and index. |
| 505 0# - FORMATTED CONTENTS NOTE | |
| Formatted contents note | Preface -- 1 Introduction -- 1.1 Mobile 3D Graphics -- 1.2 Mobile Devices and Design Challenges -- 1.2.1 Mobile Computing Power -- 1.2.2 Mobile Display Devices -- 1.2.3 Design Challenges -- 1.3 Introduction to SoC Design -- 1.4 About this Book -- 2 Application Platform -- 2.1 SoC Design Paradigms -- 2.1.1 Platform and Set-based Design -- 2.1.2 Modeling: Memory and Operations -- 2.2 System Architecture -- 2.2.1 Reference Machine and API -- 2.2.2 Communication Architecture Design -- 2.2.3 System Analysis -- 2.3 Low-power SoC Design -- 2.3.1 CMOS Circuit-level Low-power Design -- 2.3.2 Architecture-level Low-power Design -- 2.3.3 System-level Low-power Design -- 2.4 Network-on-Chip based SoC -- 2.4.1 Network-on-Chip Basics -- 2.4.2 NoC Design Considerations -- 2.4.3 Case Studies of Chip Implementation -- 3 Introduction to 3D Graphics -- 3.1 The 3D Graphics Pipeline -- 3.1.1 The Application Stage -- 3.1.2 The Geometry Stage -- 3.1.3 The Rendering Stage -- 3.2 Programmable 3D Graphics -- 3.2.1 Programmable Graphics Pipeline -- 3.2.2 Shader Models -- 4 Mobile 3D Graphics -- 4.1 Principles of Mobile 3D Graphics -- 4.1.1 Application Challenges -- 4.1.2 Design Principles -- 4.2 Mobile 3D Graphics APIs -- 4.2.1 KAIST MobileGL -- 4.2.2 Khronos OpenGL-ES -- 4.2.3 Microsoft's Direct3D-Mobile -- 4.3 Summary and Future Directions -- 5 Mobile 3D Graphics SoC -- 5.1 Low-power Rendering Processor -- 5.1.1 Early Depth Test -- 5.1.2 Logarithmic Datapaths -- 5.1.3 Low-power Texture Unit -- 5.1.4 Tile-based Rendering -- 5.1.5 Texture Compression -- 5.1.6 Texture Filtering and Anti-aliasing -- 5.2 Low-power Shader -- 5.2.1 Vertex Cache -- 5.2.2 Low-power Register File -- 5.2.3 Mobile Unified Shader -- 6 Real Chip Implementations -- 6.1 KAIST RAMP Architecture -- 6.1.1 RAMP-IV -- 6.1.2 RAMP-V -- 6.1.3 RAMP-VI -- 6.1.4 RAMP-VII -- 6.2 Industry Architecture -- 6.2.1 nVidia Mobile GPU - SC10 and Tegra -- 6.2.2 Sony PSP -- 6.2.3 Imagination Technology MBX/SGX -- 7 Low-power Rasterizer Design. |
| 505 8# - FORMATTED CONTENTS NOTE | |
| Formatted contents note | 7.1 Target System Architecture -- 7.2 Summary of Performance and Features -- 7.3 Block Diagram of the Rasterizer -- 7.4 Instruction Set Architecture (ISA) -- 7.5 Detailed Design with Register Transfer Level Code -- 7.5.1 Rasterization Top Block -- 7.5.2 Pipeline Architecture -- 7.5.3 Main Controller Design -- 7.5.4 Rasterization Core Unit -- 8 The Future of Mobile 3D Graphics -- 8.1 Game and Mapping Applications Involving Networking -- 8.2 Moves Towards More User-centered Applications -- 8.3 Final Remarks -- Appendix Verilog HDL Design -- A.1 Introduction to Verilog Design -- A.2 Design Level -- A.2.1 Behavior Level -- A.2.2 Register Transfer Level -- A.2.3 Gate Level -- A.3 Design Flow -- A.3.1 Specification -- A.3.2 High-level Design -- A.3.3 Low-level Design -- A.3.4 RTL Coding -- A.3.5 Simulation -- A.3.6 Synthesis -- A.3.7 Placement and Routing -- A.4 Verilog Syntax -- A.4.1 Modules -- A.4.2 Logic Values and Numbers -- A.4.3 Data Types -- A.4.4 Operators -- A.4.5 Assignment -- A.4.6 Ports and Connections -- A.4.7 Expressions -- A.4.8 Instantiation -- A.4.9 Miscellaneous -- A.5 Example of Four-bit Adder with Zero Detection -- A.6 Synthesis Scripts -- Glossaries -- Index. |
| 506 1# - RESTRICTIONS ON ACCESS NOTE | |
| Terms governing access | Restricted to subscribers or individual electronic text purchasers. |
| 530 ## - ADDITIONAL PHYSICAL FORM AVAILABLE NOTE | |
| Additional physical form available note | Also available in print. |
| 538 ## - SYSTEM DETAILS NOTE | |
| System details note | Mode of access: World Wide Web |
| 588 ## - SOURCE OF DESCRIPTION NOTE | |
| Source of description note | Description based on PDF viewed 12/21/2015. |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name entry element | Computer graphics. |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name entry element | Mobile computing. |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name entry element | Systems on a chip. |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name entry element | Three-dimensional display systems. |
| 655 #0 - INDEX TERM--GENRE/FORM | |
| Genre/form data or focus term | Electronic books. |
| 695 ## - | |
| -- | Algorithm design and analysis |
| 695 ## - | |
| -- | Asia |
| 695 ## - | |
| -- | Bandwidth |
| 695 ## - | |
| -- | Cognition |
| 695 ## - | |
| -- | Computer architecture |
| 695 ## - | |
| -- | Digital systems |
| 695 ## - | |
| -- | Games |
| 695 ## - | |
| -- | Geometry |
| 695 ## - | |
| -- | Graphics |
| 695 ## - | |
| -- | Graphics processing unit |
| 695 ## - | |
| -- | Hardware |
| 695 ## - | |
| -- | Hardware design languages |
| 695 ## - | |
| -- | Indexes |
| 695 ## - | |
| -- | Light sources |
| 695 ## - | |
| -- | Lighting |
| 695 ## - | |
| -- | Logic gates |
| 695 ## - | |
| -- | Memory management |
| 695 ## - | |
| -- | Microprocessors |
| 695 ## - | |
| -- | Mobile communication |
| 695 ## - | |
| -- | Mobile computing |
| 695 ## - | |
| -- | Mobile handsets |
| 695 ## - | |
| -- | Multimedia communication |
| 695 ## - | |
| -- | Pipelines |
| 695 ## - | |
| -- | Pixel |
| 695 ## - | |
| -- | Power demand |
| 695 ## - | |
| -- | Random access memory |
| 695 ## - | |
| -- | Registers |
| 695 ## - | |
| -- | Rendering (computer graphics) |
| 695 ## - | |
| -- | Software |
| 695 ## - | |
| -- | Solid modeling |
| 695 ## - | |
| -- | System-on-a-chip |
| 695 ## - | |
| -- | Terminology |
| 695 ## - | |
| -- | Three dimensional displays |
| 700 1# - ADDED ENTRY--PERSONAL NAME | |
| Personal name | Woo, Jeong-Ho. |
| 710 2# - ADDED ENTRY--CORPORATE NAME | |
| Corporate name or jurisdiction name as entry element | IEEE Xplore (Online Service), |
| Relator term | distributor. |
| 710 2# - ADDED ENTRY--CORPORATE NAME | |
| Corporate name or jurisdiction name as entry element | John Wiley & Sons, |
| Relator term | publisher. |
| 776 08 - ADDITIONAL PHYSICAL FORM ENTRY | |
| Relationship information | Print version: |
| International Standard Book Number | 9780470823774 |
| 856 42 - ELECTRONIC LOCATION AND ACCESS | |
| Materials specified | Abstract with links to resource |
| Uniform Resource Identifier | <a href="https://ieeexplore.ieee.org/xpl/bkabstractplus.jsp?bkn=5676102">https://ieeexplore.ieee.org/xpl/bkabstractplus.jsp?bkn=5676102</a> |
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